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            <div class="title">UART - Serial UART</div>
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        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 class="panel-title"> UART Register Index</h3>
            </div>
            <div class="panel-body">
                <table>
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000000:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#DR" target="_self">DR - UART Data</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000004:</span>
                        </td>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#RSR" target="_self">RSR - UART Status</a>
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                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000018:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#FR" target="_self">FR - Flag</a>
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                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000020:</span>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#ILPR" target="_self">ILPR - IrDA Counter</a>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000024:</span>
                        </td>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#IBRD" target="_self">IBRD - Integer Baud Rate Divisor</a>
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                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000028:</span>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#FBRD" target="_self">FBRD - Fractional Baud Rate Divisor</a>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x0000002C:</span>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#LCRH" target="_self">LCRH - Line Control High</a>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000030:</span>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CR" target="_self">CR - Control</a>
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                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000034:</span>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#IFLS" target="_self">IFLS - FIFO Interrupt Level Select</a>
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                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000038:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#IER" target="_self">IER - Interrupt Enable</a>
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                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x0000003C:</span>
                        </td>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#IES" target="_self">IES - Interrupt Status</a>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000040:</span>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#MIS" target="_self">MIS - Masked Interrupt Status</a>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000044:</span>
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                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#IEC" target="_self">IEC - Interrupt Clear</a>
                        </td>
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        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="DR" class="panel-title">DR - UART Data</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001C000</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001D000</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>UART Data</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="20">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">OEDATA
                                <br>0x0</td>

                            <td align="center" colspan="1">BEDATA
                                <br>0x0</td>

                            <td align="center" colspan="1">PEDATA
                                <br>0x0</td>

                            <td align="center" colspan="1">FEDATA
                                <br>0x0</td>

                            <td align="center" colspan="8">DATA
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:12</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>This bit field is reserved for future use.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>OEDATA</td>
                            <td>RO</td>
                            <td>This is the overrun error indicator.<br><br>
                                 NOERR                = 0x0 - No error on UART OEDATA, overrun error indicator.<br>
                             ERR                  = 0x1 - Error on UART OEDATA, overrun error indicator.</td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>BEDATA</td>
                            <td>RO</td>
                            <td>This is the break error indicator.<br><br>
                                 NOERR                = 0x0 - No error on UART BEDATA, break error indicator.<br>
                             ERR                  = 0x1 - Error on UART BEDATA, break error indicator.</td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>PEDATA</td>
                            <td>RO</td>
                            <td>This is the parity error indicator.<br><br>
                                 NOERR                = 0x0 - No error on UART PEDATA, parity error indicator.<br>
                             ERR                  = 0x1 - Error on UART PEDATA, parity error indicator.</td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>FEDATA</td>
                            <td>RO</td>
                            <td>This is the framing error indicator.<br><br>
                                 NOERR                = 0x0 - No error on UART FEDATA, framing error indicator.<br>
                             ERR                  = 0x1 - Error on UART FEDATA, framing error indicator.</td>
                        </tr>

                        <tr>
                            <td>7:0</td>
                            <td>DATA</td>
                            <td>RW</td>
                            <td>This is the UART data port.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="RSR" class="panel-title">RSR - UART Status</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001C004</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001D004</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>UART Status</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="28">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">OESTAT
                                <br>0x0</td>

                            <td align="center" colspan="1">BESTAT
                                <br>0x0</td>

                            <td align="center" colspan="1">PESTAT
                                <br>0x0</td>

                            <td align="center" colspan="1">FESTAT
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:4</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>This bit field is reserved for future use.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>OESTAT</td>
                            <td>RW</td>
                            <td>This is the overrun error indicator.<br><br>
                                 NOERR                = 0x0 - No error on UART OESTAT, overrun error indicator.<br>
                             ERR                  = 0x1 - Error on UART OESTAT, overrun error indicator.</td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>BESTAT</td>
                            <td>RW</td>
                            <td>This is the break error indicator.<br><br>
                                 NOERR                = 0x0 - No error on UART BESTAT, break error indicator.<br>
                             ERR                  = 0x1 - Error on UART BESTAT, break error indicator.</td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>PESTAT</td>
                            <td>RW</td>
                            <td>This is the parity error indicator.<br><br>
                                 NOERR                = 0x0 - No error on UART PESTAT, parity error indicator.<br>
                             ERR                  = 0x1 - Error on UART PESTAT, parity error indicator.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>FESTAT</td>
                            <td>RW</td>
                            <td>This is the framing error indicator.<br><br>
                                 NOERR                = 0x0 - No error on UART FESTAT, framing error indicator.<br>
                             ERR                  = 0x1 - Error on UART FESTAT, framing error indicator.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="FR" class="panel-title">FR - Flag</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001C018</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001D018</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Flag</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="23">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TXBUSY
                                <br>0x0</td>

                            <td align="center" colspan="1">TXFE
                                <br>0x0</td>

                            <td align="center" colspan="1">RXFF
                                <br>0x0</td>

                            <td align="center" colspan="1">TXFF
                                <br>0x0</td>

                            <td align="center" colspan="1">RXFE
                                <br>0x0</td>

                            <td align="center" colspan="1">BUSY
                                <br>0x0</td>

                            <td align="center" colspan="1">DCD
                                <br>0x0</td>

                            <td align="center" colspan="1">DSR
                                <br>0x0</td>

                            <td align="center" colspan="1">CTS
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:9</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>This bit field is reserved for future use.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>TXBUSY</td>
                            <td>RO</td>
                            <td>This bit holds the transmit BUSY indicator.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>TXFE</td>
                            <td>RO</td>
                            <td>This bit holds the transmit FIFO empty indicator.<br><br>
                                 XMTFIFO_EMPTY        = 0x1 - Transmit FIFO is empty.</td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>RXFF</td>
                            <td>RO</td>
                            <td>This bit holds the receive FIFO full indicator.<br><br>
                                 RCVFIFO_FULL         = 0x1 - Receive FIFO is full.</td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>TXFF</td>
                            <td>RO</td>
                            <td>This bit holds the transmit FIFO full indicator.<br><br>
                                 XMTFIFO_FULL         = 0x1 - Transmit FIFO is full.</td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>RXFE</td>
                            <td>RO</td>
                            <td>This bit holds the receive FIFO empty indicator.<br><br>
                                 RCVFIFO_EMPTY        = 0x1 - Receive FIFO is empty.</td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>BUSY</td>
                            <td>RO</td>
                            <td>This bit holds the busy indicator.<br><br>
                                 BUSY                 = 0x1 - UART busy indicator.</td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>DCD</td>
                            <td>RO</td>
                            <td>This bit holds the data carrier detect indicator.<br><br>
                                 DETECTED             = 0x1 - Data carrier detect detected.</td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>DSR</td>
                            <td>RO</td>
                            <td>This bit holds the data set ready indicator.<br><br>
                                 READY                = 0x1 - Data set ready.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>CTS</td>
                            <td>RO</td>
                            <td>This bit holds the clear to send indicator.<br><br>
                                 CLEARTOSEND          = 0x1 - Clear to send is indicated.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="ILPR" class="panel-title">ILPR - IrDA Counter</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001C020</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001D020</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>IrDA Counter</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="24">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="8">ILPDVSR
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:8</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>This bit field is reserved for future use.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7:0</td>
                            <td>ILPDVSR</td>
                            <td>RW</td>
                            <td>These bits hold the IrDA counter divisor.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="IBRD" class="panel-title">IBRD - Integer Baud Rate Divisor</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001C024</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001D024</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Integer Baud Rate Divisor</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="16">DIVINT
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>This bit field is reserved for future use.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>DIVINT</td>
                            <td>RW</td>
                            <td>These bits hold the baud integer divisor.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="FBRD" class="panel-title">FBRD - Fractional Baud Rate Divisor</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001C028</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001D028</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Fractional Baud Rate Divisor</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="26">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="6">DIVFRAC
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:6</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>This bit field is reserved for future use.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5:0</td>
                            <td>DIVFRAC</td>
                            <td>RW</td>
                            <td>These bits hold the baud fractional divisor.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="LCRH" class="panel-title">LCRH - Line Control High</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001C02C</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001D02C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Line Control High</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="24">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">SPS
                                <br>0x0</td>

                            <td align="center" colspan="2">WLEN
                                <br>0x0</td>

                            <td align="center" colspan="1">FEN
                                <br>0x0</td>

                            <td align="center" colspan="1">STP2
                                <br>0x0</td>

                            <td align="center" colspan="1">EPS
                                <br>0x0</td>

                            <td align="center" colspan="1">PEN
                                <br>0x0</td>

                            <td align="center" colspan="1">BRK
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:8</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>This bit field is reserved for future use.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>SPS</td>
                            <td>RW</td>
                            <td>This bit holds the stick parity select.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>6:5</td>
                            <td>WLEN</td>
                            <td>RW</td>
                            <td>These bits hold the write length.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>FEN</td>
                            <td>RW</td>
                            <td>This bit holds the FIFO enable.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>STP2</td>
                            <td>RW</td>
                            <td>This bit holds the two stop bits select.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>EPS</td>
                            <td>RW</td>
                            <td>This bit holds the even parity select.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>PEN</td>
                            <td>RW</td>
                            <td>This bit holds the parity enable.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>BRK</td>
                            <td>RW</td>
                            <td>This bit holds the break set.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CR" class="panel-title">CR - Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001C030</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001D030</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Control</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">CTSEN
                                <br>0x0</td>

                            <td align="center" colspan="1">RTSEN
                                <br>0x0</td>

                            <td align="center" colspan="1">OUT2
                                <br>0x0</td>

                            <td align="center" colspan="1">OUT1
                                <br>0x0</td>

                            <td align="center" colspan="1">RTS
                                <br>0x0</td>

                            <td align="center" colspan="1">DTR
                                <br>0x0</td>

                            <td align="center" colspan="1">RXE
                                <br>0x1</td>

                            <td align="center" colspan="1">TXE
                                <br>0x1</td>

                            <td align="center" colspan="1">LBE
                                <br>0x0</td>

                            <td align="center" colspan="3">CLKSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">CLKEN
                                <br>0x0</td>

                            <td align="center" colspan="1">SIRLP
                                <br>0x0</td>

                            <td align="center" colspan="1">SIREN
                                <br>0x0</td>

                            <td align="center" colspan="1">UARTEN
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>This bit field is reserved for future use.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>CTSEN</td>
                            <td>RW</td>
                            <td>This bit enables CTS hardware flow control.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14</td>
                            <td>RTSEN</td>
                            <td>RW</td>
                            <td>This bit enables RTS hardware flow control.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>13</td>
                            <td>OUT2</td>
                            <td>RW</td>
                            <td>This bit holds modem Out2.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>OUT1</td>
                            <td>RW</td>
                            <td>This bit holds modem Out1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>RTS</td>
                            <td>RW</td>
                            <td>This bit enables request to send.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>DTR</td>
                            <td>RW</td>
                            <td>This bit enables data transmit ready.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>RXE</td>
                            <td>RW</td>
                            <td>This bit is the receive enable.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>TXE</td>
                            <td>RW</td>
                            <td>This bit is the transmit enable.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>LBE</td>
                            <td>RW</td>
                            <td>This bit is the loopback enable.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>6:4</td>
                            <td>CLKSEL</td>
                            <td>RW</td>
                            <td>This bit field is the UART clock select.<br><br>
                                 NOCLK                = 0x0 - No UART clock. This is the low power default.<br>
                             24MHZ                = 0x1 - 24 MHz clock.<br>
                             12MHZ                = 0x2 - 12 MHz clock.<br>
                             6MHZ                 = 0x3 - 6 MHz clock.<br>
                             3MHZ                 = 0x4 - 3 MHz clock.<br>
                             RSVD5                = 0x5 - Reserved.<br>
                             RSVD6                = 0x6 - Reserved.<br>
                             RSVD7                = 0x7 - Reserved.</td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>CLKEN</td>
                            <td>RW</td>
                            <td>This bit is the UART clock enable.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>SIRLP</td>
                            <td>RW</td>
                            <td>This bit is the SIR low power select.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>SIREN</td>
                            <td>RW</td>
                            <td>This bit is the SIR ENDEC enable.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>UARTEN</td>
                            <td>RW</td>
                            <td>This bit is the UART enable.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="IFLS" class="panel-title">IFLS - FIFO Interrupt Level Select</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001C034</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001D034</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>FIFO Interrupt Level Select</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="26">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="3">RXIFLSEL
                                <br>0x2</td>

                            <td align="center" colspan="3">TXIFLSEL
                                <br>0x2</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:6</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>This bit field is reserved for future use.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5:3</td>
                            <td>RXIFLSEL</td>
                            <td>RW</td>
                            <td>These bits hold the receive FIFO interrupt level.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2:0</td>
                            <td>TXIFLSEL</td>
                            <td>RW</td>
                            <td>These bits hold the transmit FIFO interrupt level.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="IER" class="panel-title">IER - Interrupt Enable</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001C038</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001D038</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Interrupt Enable</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="21">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">OEIM
                                <br>0x0</td>

                            <td align="center" colspan="1">BEIM
                                <br>0x0</td>

                            <td align="center" colspan="1">PEIM
                                <br>0x0</td>

                            <td align="center" colspan="1">FEIM
                                <br>0x0</td>

                            <td align="center" colspan="1">RTIM
                                <br>0x0</td>

                            <td align="center" colspan="1">TXIM
                                <br>0x0</td>

                            <td align="center" colspan="1">RXIM
                                <br>0x0</td>

                            <td align="center" colspan="1">DSRMIM
                                <br>0x0</td>

                            <td align="center" colspan="1">DCDMIM
                                <br>0x0</td>

                            <td align="center" colspan="1">CTSMIM
                                <br>0x0</td>

                            <td align="center" colspan="1">TXCMPMIM
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:11</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>This bit field is reserved for future use.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>OEIM</td>
                            <td>RW</td>
                            <td>This bit holds the overflow interrupt enable.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>BEIM</td>
                            <td>RW</td>
                            <td>This bit holds the break error interrupt enable.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>PEIM</td>
                            <td>RW</td>
                            <td>This bit holds the parity error interrupt enable.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>FEIM</td>
                            <td>RW</td>
                            <td>This bit holds the framing error interrupt enable.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>RTIM</td>
                            <td>RW</td>
                            <td>This bit holds the receive timeout interrupt enable.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>TXIM</td>
                            <td>RW</td>
                            <td>This bit holds the transmit interrupt enable.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>RXIM</td>
                            <td>RW</td>
                            <td>This bit holds the receive interrupt enable.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>DSRMIM</td>
                            <td>RW</td>
                            <td>This bit holds the modem DSR interrupt enable.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>DCDMIM</td>
                            <td>RW</td>
                            <td>This bit holds the modem DCD interrupt enable.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>CTSMIM</td>
                            <td>RW</td>
                            <td>This bit holds the modem CTS interrupt enable.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>TXCMPMIM</td>
                            <td>RW</td>
                            <td>This bit holds the modem TXCMP interrupt enable.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="IES" class="panel-title">IES - Interrupt Status</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001C03C</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001D03C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Interrupt Status</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="21">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">OERIS
                                <br>0x0</td>

                            <td align="center" colspan="1">BERIS
                                <br>0x0</td>

                            <td align="center" colspan="1">PERIS
                                <br>0x0</td>

                            <td align="center" colspan="1">FERIS
                                <br>0x0</td>

                            <td align="center" colspan="1">RTRIS
                                <br>0x0</td>

                            <td align="center" colspan="1">TXRIS
                                <br>0x0</td>

                            <td align="center" colspan="1">RXRIS
                                <br>0x0</td>

                            <td align="center" colspan="1">DSRMRIS
                                <br>0x0</td>

                            <td align="center" colspan="1">DCDMRIS
                                <br>0x0</td>

                            <td align="center" colspan="1">CTSMRIS
                                <br>0x0</td>

                            <td align="center" colspan="1">TXCMPMRIS
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:11</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>This bit field is reserved for future use.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>OERIS</td>
                            <td>RO</td>
                            <td>This bit holds the overflow interrupt status.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>BERIS</td>
                            <td>RO</td>
                            <td>This bit holds the break error interrupt status.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>PERIS</td>
                            <td>RO</td>
                            <td>This bit holds the parity error interrupt status.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>FERIS</td>
                            <td>RO</td>
                            <td>This bit holds the framing error interrupt status.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>RTRIS</td>
                            <td>RO</td>
                            <td>This bit holds the receive timeout interrupt status.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>TXRIS</td>
                            <td>RO</td>
                            <td>This bit holds the transmit interrupt status.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>RXRIS</td>
                            <td>RO</td>
                            <td>This bit holds the receive interrupt status.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>DSRMRIS</td>
                            <td>RO</td>
                            <td>This bit holds the modem DSR interrupt status.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>DCDMRIS</td>
                            <td>RO</td>
                            <td>This bit holds the modem DCD interrupt status.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>CTSMRIS</td>
                            <td>RO</td>
                            <td>This bit holds the modem CTS interrupt status.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>TXCMPMRIS</td>
                            <td>RO</td>
                            <td>This bit holds the modem TXCMP interrupt status.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="MIS" class="panel-title">MIS - Masked Interrupt Status</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001C040</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001D040</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Masked Interrupt Status</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="21">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">OEMIS
                                <br>0x0</td>

                            <td align="center" colspan="1">BEMIS
                                <br>0x0</td>

                            <td align="center" colspan="1">PEMIS
                                <br>0x0</td>

                            <td align="center" colspan="1">FEMIS
                                <br>0x0</td>

                            <td align="center" colspan="1">RTMIS
                                <br>0x0</td>

                            <td align="center" colspan="1">TXMIS
                                <br>0x0</td>

                            <td align="center" colspan="1">RXMIS
                                <br>0x0</td>

                            <td align="center" colspan="1">DSRMMIS
                                <br>0x0</td>

                            <td align="center" colspan="1">DCDMMIS
                                <br>0x0</td>

                            <td align="center" colspan="1">CTSMMIS
                                <br>0x0</td>

                            <td align="center" colspan="1">TXCMPMMIS
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:11</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>This bit field is reserved for future use.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>OEMIS</td>
                            <td>RO</td>
                            <td>This bit holds the overflow interrupt status masked.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>BEMIS</td>
                            <td>RO</td>
                            <td>This bit holds the break error interrupt status masked.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>PEMIS</td>
                            <td>RO</td>
                            <td>This bit holds the parity error interrupt status masked.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>FEMIS</td>
                            <td>RO</td>
                            <td>This bit holds the framing error interrupt status masked.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>RTMIS</td>
                            <td>RO</td>
                            <td>This bit holds the receive timeout interrupt status masked.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>TXMIS</td>
                            <td>RO</td>
                            <td>This bit holds the transmit interrupt status masked.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>RXMIS</td>
                            <td>RO</td>
                            <td>This bit holds the receive interrupt status masked.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>DSRMMIS</td>
                            <td>RO</td>
                            <td>This bit holds the modem DSR interrupt status masked.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>DCDMMIS</td>
                            <td>RO</td>
                            <td>This bit holds the modem DCD interrupt status masked.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>CTSMMIS</td>
                            <td>RO</td>
                            <td>This bit holds the modem CTS interrupt status masked.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>TXCMPMMIS</td>
                            <td>RO</td>
                            <td>This bit holds the modem TXCMP interrupt status masked.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="IEC" class="panel-title">IEC - Interrupt Clear</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001C044</span>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 1 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4001D044</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Interrupt Clear</p>
                <h3>Example Macro Usage:</h3>
                <pre style="margin:10px" class="language-pascal"><span style='color:#3f7f59; '>//
// Register access is all performed through the standard CMSIS structure-based
// interface. This includes module-level structure definitions with members and
// bitfields corresponding to the physical registers and bitfields within each
// module. In addition, Ambiq has provided instance-level macros for modules
// that have more than one physical instance and a generic AM_REGVAL() macro
// for directly accessing memory by address.
//
// The following examples show how to use these structures and macros:

// Setting the ADC configuration register...</span>
AM_REGVAL(0x50010000) = 0x1234;              <span style='color:#3f7f59; '>// by address.</span>
ADC-&gt;CFG = 0x1234;                           <span style='color:#3f7f59; '>// by structure pointer.</span>
ADCn(0)-&gt;CFG = 0x1234;                       <span style='color:#3f7f59; '>// by structure pointer (with instance number).</span>

<span style='color:#3f7f59; '>// Changing the ADC clock...</span>
ADCn(0)-&gt;CFG_b.CLKSEL = 0x2;                 <span style='color:#3f7f59; '>// by raw value.</span>
ADCn(0)-&gt;CFG_b.CLKSEL = ADC_CFG_CLKSEL_HFRC; <span style='color:#3f7f59; '>// using an enumerated value.</span></pre>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="21">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">OEIC
                                <br>0x0</td>

                            <td align="center" colspan="1">BEIC
                                <br>0x0</td>

                            <td align="center" colspan="1">PEIC
                                <br>0x0</td>

                            <td align="center" colspan="1">FEIC
                                <br>0x0</td>

                            <td align="center" colspan="1">RTIC
                                <br>0x0</td>

                            <td align="center" colspan="1">TXIC
                                <br>0x0</td>

                            <td align="center" colspan="1">RXIC
                                <br>0x0</td>

                            <td align="center" colspan="1">DSRMIC
                                <br>0x0</td>

                            <td align="center" colspan="1">DCDMIC
                                <br>0x0</td>

                            <td align="center" colspan="1">CTSMIC
                                <br>0x0</td>

                            <td align="center" colspan="1">TXCMPMIC
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:11</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>This bit field is reserved for future use.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>OEIC</td>
                            <td>WO</td>
                            <td>This bit holds the overflow interrupt clear.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>BEIC</td>
                            <td>WO</td>
                            <td>This bit holds the break error interrupt clear.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>PEIC</td>
                            <td>WO</td>
                            <td>This bit holds the parity error interrupt clear.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>FEIC</td>
                            <td>WO</td>
                            <td>This bit holds the framing error interrupt clear.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>RTIC</td>
                            <td>WO</td>
                            <td>This bit holds the receive timeout interrupt clear.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>TXIC</td>
                            <td>WO</td>
                            <td>This bit holds the transmit interrupt clear.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>RXIC</td>
                            <td>WO</td>
                            <td>This bit holds the receive interrupt clear.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>DSRMIC</td>
                            <td>WO</td>
                            <td>This bit holds the modem DSR interrupt clear.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>DCDMIC</td>
                            <td>WO</td>
                            <td>This bit holds the modem DCD interrupt clear.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>CTSMIC</td>
                            <td>WO</td>
                            <td>This bit holds the modem CTS interrupt clear.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>TXCMPMIC</td>
                            <td>WO</td>
                            <td>This bit holds the modem TXCMP interrupt clear.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

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            <small>
                AmbiqSuite Register Documentation&nbsp;
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